D3100/D3101 External DDR LVDS/RGB Display SoC
D3100/D3101 is a 1.0 GHz HiChip D-series SoC with up to 256 MB @1333 Mbps external DRAM and FHD 60 fps multi-format decode. Display output is RGB565/LVDS; video input is HD input / CVBS, running RTOS/Linux in an eLQFP128 package.
The official HiChip product page lists D3100/D3101; this page follows the official product page.
Product Image
Key Specifications
| Item | Spec |
|---|---|
| CPU | 1.0 GHz |
| DRAM | ext. max. 256 MB @1333 Mbps |
| Flash | SPI Flash |
| Video decoder | Multi-format @FHD 60 fps |
| Display | RGB565 / LVDS |
| Video input | HD input / CVBS |
| Audio | I2S in + I2S out |
| USB | USB 2.0 Host + USB 2.0 Host/Slave |
| SDIO | SDIO 3.0 / eMMC 4.4 (4 line) |
| I2C/UART | 6×PWM, 2×UART, 1×SARADC, IRRX |
| Ethernet | — |
| Wi-Fi | D3100 supported |
| SW system | RTOS/Linux |
| Package | eLQFP128 |
Typical Applications
- Projectors, displays, smart screens, commercial TVs
Design Notes
- Streamlined display interfaces (no MIPI/CVBS output) for cost-effective LVDS large-panel + HD input designs.
- No RMII; for Ethernet choose D3000 or D3200.
- Supports 2K FHD decode (per official notes).