Video Switching
This page lists MacroSilicon video switching IC models with selection comparison for multi-input HD switching, DP multi-display expansion, and 4×4 matrix routing.
MS9604 is also listed under video processing; this page focuses on switching and routing. Confirm final selection with official datasheets, reference designs, and sample validation.
Model List
| MS9404M3 | MS9601A | MS9604 |
Quick Selection
| Requirement | Recommended model | Notes |
|---|---|---|
| DP 1.4a multi-display / Hub | MS9404M3 | 1 DP in, 2 DP + 2 HD 2.0 out; 8K DSC / 4K@60; HDCP Repeater |
| HD 3-in 1-out switching | MS9601A | 3 Gbps, 4K@30; synchronized DDC/HPD; integrated power conversion; cascadable |
| 4 x 4 HD matrix routing | MS9604 | 4-in 4-out independent channels, 4K@30; programmable EDID/HPD/EQ; 1x I2S/SPDIF |
Parameter Comparison
| Model | Product type | Input | Output | Max resolution | Audio | HDCP | Control / EDID | Package |
|---|---|---|---|---|---|---|---|---|
| MS9404M3 | DP 1.4a Hub | 1× DP 1.4a (1/2/4 Lane) | 2× DP 1.4a + 2× HD 2.0 | DP 7680×4320@60 (DSC); HD 3840×2160@60 | — | 1.x / 2.x; Repeater | Integrated 8051 MCU; MST 1–3 paths | BGA224 (10 mm × 10 mm) |
| MS9601A | HD 3-in 1-out switch | 3× HD | 1× HD | 4K@30 (3 Gbps) | — | — | Synchronized DDC/HPD; integrated MCU or I²C; 6 cascade addresses; IR/key | LQFP-64 (10 mm × 10 mm) |
| MS9604 | 4-in 4-out HD matrix | 4× HD | 4× HD | 4K@30 | 1× I²S/SPDIF 32 kHz–192 kHz | Not published | Programmable EDID/HPD; auto input EQ | HLQFP-216 (24 mm × 24 mm) |
Selection Notes
- Notebook / workstation DP docks: MS9404M3 expands one DP port to multiple DP and HD outputs for MST multi-display and heterogeneous outputs; validate target OS and display DSC/HDCP support.
- Conference room / classroom three-source switching: MS9601A is a pure switcher with DDC/HPD synchronized to video, suited to 3-in 1-out switch boxes; plan I²C addresses when cascading multiple chips.
- Four independent input/output routes: MS9604 provides 4×4 independent channels with EDID management for matrix scheduling; for multiview compositing, OSD, or integrated DDR, evaluate MS1825 / MS1826 in the video processing series.
Related Pages
- MacroSilicon model summary
- Video processing series (includes MS9604 processing-side notes)