Video Processing
This page lists MacroSilicon video processing IC models with selection comparison, covering analog video processing, multichannel HD scaling/OSD, 4K matrix, and LCD panel drive solutions.
Models differ significantly in OSD font libraries, frame buffers, HDCP, overlay layers, and I/O topology. “Not published” in the tables means the current public product materials do not list the item; it does not mean the chip definitely lacks the capability. Confirm final selection with official datasheets, reference designs, and sample validation.
Model List
| MS1823 | MS1824 | MS1825 | MS1826 | MS1826A |
| MS1826B | MS1827 | MS1861 | MS9604 |
Quick Selection
| Requirement | Recommended model | Notes |
|---|---|---|
| Analog video PIP / POP | MS1823 | 6-channel ADC + 3-channel DAC, dual independent playback, up to 1080p |
| Analog + digital mixed interfaces | MS1824 | 12-channel ADC, BT656/BT1120/RGB/YUV digital I/O |
| 4 x 4 multiview matrix, 1080p | MS1825 | 4K@30Hz, 4 OSD windows, 1x I2S/SPDIF; external frame-buffer access interface |
| 4 x 4 multiview matrix, 4K@30 | MS1826 | 128 MB DDR3, up to 8 video overlays, 4 audio paths, HBR |
| Multi-input merge to single display | MS1826A | 4 in / 1 out, 64 MB DDR3, suited to multiview compositing |
| Single-input distribution to multiple displays | MS1826B | 1 in / 4 out, 128 MB DDR3, suited to video-wall front ends |
| 4 x 4 multiview matrix, 4K@60 | MS1827 | 8 scalers, 8 layers, 2 Gb DDR, integrated 32-bit controller |
| HD to MIPI / LVDS panel | MS1861 | Integrated ARM + DDR3, MIPI DSI-2 / LVDS / TTL output |
| 4 x 4 basic matrix | MS9604 | 4K@30Hz, EDID/HPD/EQ; OSD and frame-buffer specs not published; also see video switching |
Parameter Comparison
| Model | Product type | Video input | HD in / out | Max resolution | Audio | OSD | Frame buffer | HDCP | Video processing | Package |
|---|---|---|---|---|---|---|---|---|---|---|
| MS1823 | Multi-function analog video processor | 6x 10-bit ADC; RGB/YC/CVBS | — | 1080p in; analog DAC out | — | 1 window; 1/2/4 bpp characters | External; 162 MHz | — | Dual PIP/POP; deinterlace; 3D NR; Y/C separation; frame-rate conversion; independent scaling | LQFP100 (14 mm × 14 mm) |
| MS1824 | Analog + digital video processor | 12-channel ADC + BT656/601/1120 16/24-bit RGB/YUV | — | 1080p in/out | — | Character OSD | External; 162 MHz | — | Same as MS1823; SDR/DDR digital transport; LCD 24-bit 4:4:4 output | LQFP128 (14 mm × 14 mm) |
| MS1825 | 4-in 4-out HD processor | 24/16/8-bit digital video | 4 in / 4 out | 4K@30Hz | 1x I2S/SPDIF 32 kHz–192 kHz | 4 windows; 1 bpp common font library | External; 188 MHz | — | PIP/POP; independent scaling; deinterlace; 3:2/2:2; EDID/HPD/EQ | HLQFP-216 (24 mm × 24 mm) |
| MS1826 | 4-in 4-out HD processor | HD | 4 in / 4 out | 4K@30Hz | 4x I2S/SPDIF; HBR | 4 windows; 128 KB custom font library | Integrated 128 MB DDR3 | — | Up to 8 overlays; 90°/180°/270° rotation; crop/mirror; compressed frame buffer | HLQFP-256 (28 mm × 28 mm) |
| MS1826A | 4-in 1-out HD processor | HD | 4 in / 1 out | 4K@30Hz | 1x I2S/SPDIF; HBR | Same as MS1826 | Integrated 64 MB DDR3 | — | Same as MS1826 | HLQFP-256 (28 mm × 28 mm) |
| MS1826B | 1-in 4-out HD processor | HD | 1 in / 4 out | 4K@30Hz | 1x I2S/SPDIF; HBR | Same as MS1826 | Integrated 128 MB DDR3 | — | Same as MS1826 | HLQFP-256 (28 mm × 28 mm) |
| MS1827 | Multichannel 4K A/V processor | HD (DVI 1.0 compatible) | 4 in / 4 out | 4K@60Hz | Up to 8-channel I2S/SPDIF HBR / DSD / DST | 4 OSD engines; 64 KB font library per path | Integrated 2 Gb DDR | 2.3 / 1.4 encrypt/decrypt | 8 scalers; 8 layers; 4 deinterlacers; scene-switch effects; integrated 32-bit controller | BGA-371 (20 mm × 20 mm) |
| MS1861 | Video processing and LCD controller | HD + LVDS + digital video | 1x HD input | 3840×2160@60Hz panel | Up to 8 channels 32 kHz–1536 kHz | OSD overlay | Integrated DDR3 + ARM | — | Bypass/scaler; Gamma; MIPI DSI-2 / LVDS / TTL; TCON timing | BGA-361 (13 mm × 13 mm) |
| MS9604 | 4-in 4-out HD processor | HD | 4 in / 4 out | 4K@30Hz | 1x I2S/SPDIF 32 kHz–192 kHz | Not published | Not published | Not published | Auto EQ; programmable EDID/HPD; color space and bit-depth support | HLQFP-216 (24 mm × 24 mm) |
MS1826 Series Topology
- MS1826: 4 in / 4 out, integrated 128 MB DDR3, suited to multi-input multi-output matrix processing.
- MS1826A: 4 in / 1 out, integrated 64 MB DDR3, suited to merging multiple inputs onto one display.
- MS1826B: 1 in / 4 out, integrated 128 MB DDR3, suited to distributing one input to multiple displays.
Published materials list similar core video-processing capabilities; the main differences are I/O topology, audio interface count, and integrated DDR capacity. Validate usable feature combinations with firmware and bandwidth planning.
Selection Notes
- Analog video first: MS1823 is sufficient; upgrade to MS1824 if BT656/BT1120 or LCD digital interfaces are required.
- 4 x 4 basic matrix: evaluate MS9604; choose MS1825 for multiview compositing, 4 OSD windows, and an external frame-buffer access interface.
- 4 x 4 multiview matrix, 4K@30: prioritize the MS1826 series; pick MS1826 / MS1826A / MS1826B by I/O topology.
- 4 x 4 multiview matrix, 4K@60: evaluate MS1827; HDCP use requires appropriate authorization and key management.
- Driving TFT-LCD panels: MS1861 integrates ARM, panel timing, and MIPI/LVDS output—different positioning from pure HD matrix processors.
- MS1825 vs MS1826: MS1825 provides an external frame-buffer access interface; the MS1826 series integrates DDR with larger font libraries, multiple audio paths, and up to 8 video overlays for higher integration.
Related Pages
- MacroSilicon model summary
- Video switching series (includes MS9604 switching-side notes)